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• 1. FLAGS register - Wikipedia

  wikipedia.org

  Link: https://en.wikipedia.org/wiki/FLAGS_register

  Description: WebThe FLAGS register is the status register that contains the current state of an x86 CPU. The size and meanings of the flag bits are architecture dependent. It usually reflects the result of arithmetic operations as well as information about restrictions placed on the CPU operation at the current time. Some of those restrictions may include ...

• 2. EFLAGS Individual Bit Flags - c-jump

  c-jump.com

  Link: http://www.c-jump.com/CIS77/ASM/Instructions/I77_0070_eflags_bits.htm

  Description: WebEFLAGS Individual Bit Flags. Carry Flag: Set by arithmetic instructions which generate either a carry or borrow. Set when an operation generates a carry to or a borrow from a destination operand. Parity flag: Set by most CPU instructions if the least significant (aka the low-order bits) of the destination operand contain an even number of 1's.

• 3. x86 Assembly/X86 Architecture - Wikibooks, open books for an …

  wikibooks.org

  Link: https://en.wikibooks.org/wiki/X86_Assembly/X86_Architecture

  Description: WebJan 1, 2024 · The EFLAGS is a 32-bit register used as a collection of bits representing Boolean values to store the results of operations and the state of the processor. The names of these bits are: 31

• 4. EFLAGS Registers of 80386 Microprocessor - GeeksforGeeks

  geeksforgeeks.org

  Link: https://www.geeksforgeeks.org/eflags-registers-of-80386-microprocessor/

  Description: WebAug 17, 2022 · EFLAGS Registers of 80386 Microprocessor. Last Updated : 17 Aug, 2022. A flag is a flip-flop that controls certain EU activities or signals a situation carried on by the execution of an instruction. Thirteen flags are present in the EFLAG register. EFLAGS, a 32-bit register, operates as the flags register.

• 5. PUSHF/PUSHFD/PUSHFQ — Push EFLAGS Register Onto the …

  felixcloutier.com

  Link: https://www.felixcloutier.com/x86/pushf:pushfd:pushfq

  Description: WebDescription ¶. Decrements the stack pointer by 4 (if the current operand-size attribute is 32) and pushes the entire contents of the EFLAGS register onto the stack, or decrements the stack pointer by 2 (if the operand-size attribute is 16) and pushes the lower 16 bits of the EFLAGS register (that is, the FLAGS register) onto the stack.

• 6. Understanding of the EFLAGS register in x86, going from 1 to 0 …

  stackoverflow.com

  Link: https://stackoverflow.com/questions/60356973/understanding-of-the-eflags-register-in-x86-going-from-1-to-0-to-1-and-back

  Description: WebJun 15, 2022 · EFLAGS contains a set of flags and CF is only one of them. Arithmetic instructions update more than one flags according to the result (like ZF, SF) and the change (like CF and OF). So you need to look at individual bits to understand each flag.The funny thing about your example is that INC and DEC actually don't update CF.

• 7. 80386 Programmer's Reference Manual -- Section 2.3

  mit.edu

  Link: https://css.csail.mit.edu/6.858/2014/readings/i386/s02_03.htm

  Description: WebThe flags register is a 32-bit register named EFLAGS. Figure 2-8 defines the bits within this register. The flags control certain operations and indicate the status of the 80386. The low-order 16 bits of EFLAGS is named FLAGS and can be treated as a unit.

• 8. CS107 Guide to x86-64 - Stanford University

  stanford.edu

  Link: https://web.stanford.edu/class/archive/cs/cs107/cs107.1216/guide/x86-64.html

  Description: WebThe special %eflags register stores a set of boolean flags called the condition codes. Most arithmetic operations update those codes. A conditional jump reads the condition codes to determine whether to take the branch or not. The condition codes include ZF (zero flag), SF (sign flag), OF (overflow flag, signed), and CF (carry flag, unsigned).

• 9. Flag Control (EFLAG) Instructions - x86 Assembly Language ... - Oracle

  oracle.com

  Link: https://docs.oracle.com/cd/E36784_01/html/E36859/eoizw.html

  Description: Web3.2.10 Flag Control (EFLAG) Instructions. The status flag control instructions operate on the bits in the %eflags register. Table 3-11 Flag Control Instructions. Oracle Solaris Mnemonic. Intel/AMD Mnemonic.

• 10. POPF/POPFD/POPFQ — Pop Stack Into EFLAGS Register

  felixcloutier.com

  Link: https://www.felixcloutier.com/x86/popf:popfd:popfq

  Description: WebPops a doubleword (POPFD) from the top of the stack (if the current operand-size attribute is 32) and stores the value in the EFLAGS register, or pops a word from the top of the stack (if the operand-size attribute is 16) and stores it in the lower 16 bits of the EFLAGS register (that is, the FLAGS register).